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Intel delays Diamond Rapids Xeon 7, unveils 256-core flagship for HPC

Intel pushed back the launch of its Diamond Rapids Xeon 7 CPUs to 2027 and revealed that its top SKU will house 256 performance cores, targeting high-performance computing.

Intel confirmed that its Diamond Rapids Xeon 7 platform, initially slated for this year, will be delayed until 2027, with the flagship model featuring 256 performance cores instead of the previously announced 192. The chip employs a modular chiplet design comprising up to 22 components, including up to four 16-core compute dies fabricated on the 18A-P node, base dies on Intel 3-T, and two scalable fabric hub dies on Intel 3 that handle memory and I/O. The architecture delivers up to 16 DDR5 channels at 8,000 MT/s, 128 PCIe 6.0/CXL 3/UPI 3 lanes, and additional PCIe 4.0 lanes, while abandoning hyper-threading to focus on high-core-count HPC applications.

Intel claims the new process offers either 18 % lower power for the same performance or up to 9 % higher performance at equal power, complemented by updated AMX instructions and AVX 10.2 support. Although details such as clock speeds and cache hierarchy are still missing, the platform aims to match AMD's upcoming 256-core Venice Epyc in core count, memory bandwidth, and power envelope, with success likely hinging on pricing and value for specialized workloads.

Why it matters

The chip could reshape the high-performance computing market by offering unprecedented core density without hyper-threading.

In this story

Diamond RapidsXeon 7256 coreschiplet architecturehyperthreadingHPCDDR5PCIe 6.0AVX 10.2
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